By : ATHIRAH BT ZAHARUDIN
MIPS Assembly Arithmetics Instruction
All arithmetic and logical instructions have 3 operands
Operand order is fixed (destination first):
<opcode> <dest>, <src1>, <src2>
Example:
C code: a = b + c;
MIPS ‘code’: add a, b, c
“The natural number of operands for an operation like addition is three…requiring every
instruction to have exactly three operands, no more and no less, conforms to the
philosophy of keeping the hardware simple”
Assembly Arithmetic Instructions
Design Principle: simplicity favors regularity.
Of course this complicates some things...
C code: a = b + c + d;
MIPS pseudo-code: add a, b, c
add a, a, d
Operands must be registers (or immediates), only 32 registers are provided
Design Principle: smaller is faster.
addi
addiu
addu
div
mult
multu
sub
subu
...
Immediates
In MIPS assembly, immediates are literal constants.
Many instructions allow immediates to be used as parameters.
addi $t0, $t1, 42 # note the opcode
li $t0, 42 # actually a pseudo-instruction
Note that immediates cannot be used with all MIPS assembly instructions; refer to your
MIPS reference card.
Immediates may also be expressed in hexadecimal: 0xFFFFFFFF
MIPS Assembly Logical Instructions
Logical instructions also have 3 operands:
<opcode> <dest>, <src1>, <src2>
Examples:
and $s0, $s1, $s2 # bitwise AND
andi $s0, $s1, 42
or $s0, $s1, $s2 # bitwise OR
or $s0, $s1, $s2 # bitwise OR
ori $s0, $s1, 42
nor $s0, $s1, $s2 # bitwise NOR (i.e., NOT OR)
sll $s0, $s1, 10 # logical shift left
srl $s0, $s1, 10 # logical shift right
QTP: MIPS assembly doesn’t include the logical operation not.
Assembly Load and Store Instructions
Transfer data between memory and registers
Example:
C code: A[12] = h + A[8];
MIPS code: lw $t0, 32($s3) # load word
add $t0, $s2, $t0
sw $t0, 48($s3) # store word
Can refer to registers by name (e.g., $s2, $t2) instead of number
Load command specifies destination first: opcode <dest>, <address>
Store command specifies destination last: opcode <dest>, <address>
Remember arithmetic operands are registers or immediates, not memory!
Can’t write: add 48($s3), $s2, 32($s3)
Addressing Modes
In register mode the address is simply the value in a register:
lw $t0, ($s3)
In immediate mode the address is simply an immediate value in the instruction:
lw $t0, 0
In base + register mode the address is the sum of an immediate and the value in a
register:
lw $t0, 100($s3)
There are also various label modes:
j absval
j absval + 100
j absval + 100($s3)
Calculation
MIPS
- loading words but addressing bytes
- arithmetic on registers only
# Instruction # Meaning
add $s1, $s2, $s3 # $s1 = $s2 + $s3
sub $s1, $s2, $s3 # $s1 = $s2 – $s3
sub $s1, $s2, $s3 # $s1 = $s2 – $s3
lw $s1, 100($s2) # $s1 = Memory[$s2+100]
sw $s1, 100($s2) # Memory[$s2+100] = $s1
HERE IS THE MIPS REFERENCE DATA
Below is the CPU Arithmetics Instruction
ADD Add Word
ADDI Add Immediate Word
ADDIU Add Immediate Unsigned Word
ADDU Add Unsigned Word
CLO Count Leading Ones in Word
CLZ Count Leading Zeros in Word
DIV Divide Word
DIVU Divide Unsigned Word
MADD Multiply and Add Word to Hi, Lo
MADDU Multiply and Add Unsigned Word to Hi, Lo
MSUB Multiply and Subtract Word to Hi, Lo
MSUBU Multiply and Subtract Unsigned Word to Hi, Lo
MUL Multiply Word to GPR
MULT Multiply Word
MULTU Multiply Unsigned Word
SEB Sign Extend Byte
SEH Sign Extend Halfword
SLT Set on Less Than
SLTI Set on Less Than Immediate
SLTIU Set on Less Than Immediate Unsigned
SLTU Set on Less Than Unsigned
SUB Subtract Word
SUBU Subtract Unsigned Word
MIPS INSTRUCTION SET
